Semiconductors have recently been used not only for memories and CPUs, but also for CCDs and liquid crystal devices, and semiconductor exposure apparatuses have also been used to produce these devices. Video devices such as a CCD have color filters formed on chips for color display. A color filter is generally formed by applying a photoresist as a mixture of R, G, and B coloring agents onto an entire wafer surface, and forming a color filter on CCD pixel cells by a photo process.
The arrangement and operation of a typical semiconductor exposure apparatus will be explained with reference to FIG. 7.
A wafer W to be exposed is set on a resist coating device COAT by a transport robot (not shown), or the like. The resist coating device COAT applies a resist REG into a thin film from a nozzle CN onto the wafer W while rotating the wafer W. In order to strip the resist attached to the outer peripheral portion of the wafer W, the wafer W is transported to a resist rinsing device RINS. The resist rinsing mechanism is to spread a resist stripping solution RIN from the distal end of a nozzle RN and strip the resist from the outer peripheral portion. This step is executed to prevent contamination of the lower surface of the wafer W at the outer peripheral portion by the resist and contamination of the chip by stripping of the resist attached to the edge.
The wafer W is transported onto a wafer chuck CH on a two-dimensionally movable wafer stage STG within the exposure apparatus. In transportation, alignment measurement is executed to accurately measure the wafer position on the wafer stage STG. In alignment measurement, alignment marks (e.g., PMR, PML, and FXY1 (FX1 and FY1) to FXY4 (FX4 and FY4) in FIG. 4) on the wafer W are measured using an alignment scope SC and image processing device P.
For coarse detection (pre-alignment), the scaling factor of the alignment socpe SC is set low to measure the positions of the pre-alignment marks PMR and PML. The purpose of the coarse detection is to measure an error left when the wafer W transported to the wafer chuck CH is set on the wafer chuck CH, and to reduce the error within the grasp range of high-precision detection. Movement to the pre-alignment marks PMR and PML is done by moving the wafer stage STG. The wafer stage STG is moved by a motor M in accordance with an instruction from a control device MC, while the position of the wafer stage STG is accurately measured by a laser interferometer LP.
Light emitted by an alignment illumination device L1 illuminates pre-alignment marks PMOL and PMOR via a half-mirror M1. Light beams reflected by the pre-alignment marks PML and PMR form images on a photoelectric conversion element S1 such as a CCD camera via the half-mirror M1 and a half-mirror M2. Video signals from the photoelectric conversion element S1 are converted into digital data by an analog/digital converter AD1. The digital data are stored in a memory MEM1, and the positions of the marks are calculated by an image processor COM1. The position of the wafer W is determined from the mark positions calculated by the image processor COM1 and a stage position designated by the control device MC.
In order to measure a precise wafer position (high-precision alignment), the scaling factor of the alignment scope SC is set high to obtain the positions of the high-precision alignment marks FXY1 to FXY4. Similar to coarse detection, the stage position is moved to the high-precision alignment mark FXY1, or the like. Light from the alignment illumination device L1 irradiates the high-precision alignment mark FXY1, or the like, and reflected light is received by a sensor S2. The sensor S2 also adopts a photoelectric conversion element such as a CCD or CCD camera. An electrical signal from the sensor S2 is converted into a digital signal by an analog/digital converter AD2. The digital signal is stored in a memory MEM2, and the mark position is calculated by an image processor COM2. The mark positions of all the high-precision alignment marks FXY1 to FXY4 are determined by the same sequence, and the wafer position on the stage STG is accurately calculated.
After the end of alignment, the circuit pattern of a reticle R on a reticle stage RSTG is projected onto the resist on the wafer W via a projection lens LENS. In exposure, a masking blade MS is set in accordance with an exposure region (PAT in FIG. 8) on the reticle R. Light emitted by an exposure illumination device IL exposes the wafer W via the masking blade MS, reticle R, and projection lens LENS.
When the wafer W is applied to production of a color CCD element, or the like, the resist applied by the resist coating device COAT may result in a resist containing R, G and B coloring agents. In this case, illumination light may be absorbed in the resist in accordance with the wavelength of illumination light used in the alignment scope SC, failing to obtain a signal of a high-contrast alignment mark. As one solution for this problem, the wavelength of illumination light is changed to one which is not absorbed in the resist.
In this method, chromatic aberration of the alignment scope SC occurs. In a lens used for high-precision measurement, the wavelength width of light for use must be limited to minimize aberration. It is, therefore, difficult to greatly change the wavelength for R, G, and B colors. As another solution method, a resist, which is applied onto an alignment mark on a wafer and contains a coloring agent, is stripped.
To strip a resist from only the PMR portion and FXY1 portion in FIG. 4, the stripping solution must be applied to a narrow region (100 μm□), which is not practical. Considering this, there is proposed a method of printing an alignment pattern at the center peripheral portion of the wafer W, and stripping the resist using the resist rinsing device RINS (see, e.g., Japanese Patent Laid-Open Nos. 7-273018, 9-275058, and 10-242043).
In recent years, the width of a scribe line for cutting an IC chip on a completed wafer becomes narrower in order to maximize the area of the circuit pattern. Demands have arisen for downsizing an alignment mark printed in a region such as a scribe line not serving as an IC chip. Depending on the step shape of the scribe line, it becomes difficult to detect an alignment mark due to distortion of an alignment mark signal. Under these circumstances, an alignment mark must be printed at a portion other than a scribe line.
When an exposure mark is formed at the end of a reticle in order to expose a scribe line to an alignment mark, the mark may deform owing to distortion. The mark deformation generates a measurement error, and the mark position, i.e., wafer position, cannot be accurately measured.
To print an alignment mark at the outer peripheral portion of a wafer, Japanese Patent Laid-Open Nos. 9-275058 and 10-242043 propose a method of preparing exposure mark patterns PM and FM dedicated to alignment marks on the reticle R in addition to the circuit pattern PAT shown in FIG. 8. This method can also be applied when an alignment mark is projected onto an arbitrary portion.
The flow of circuit pattern exposure and alignment mark exposure in the above proposal will be roughly described.
Step 1: An exposure control program for exposure of a circuit pattern on a reticle is set.
Step 2: The masking blade is limited to the size of a circuit pattern region (PAT) on the reticle.
Step 3: The alignment mark of a wafer is measured to align the wafer and the reticle.
Step 4: The wafer is exposed to the circuit pattern on the reticle.
Step 5: The program is changed to an exposure control program for exposure of an alignment mark pattern.
Step 6: The masking blade is limited to the region of a mark pattern (PM or FM) on the reticle.
Step 7: The wafer is exposed to the alignment mark.
This method has the following demerits (i) and (ii).
(i) This method requires two kinds of exposure control programs. For two or more kinds of alignment marks, three or more kinds of exposure control programs may be necessary.
(ii) Two regions, i.e., circuit and alignment mark regions, or more regions must be ensured on a reticle.
Since the exposure apparatus must be controlled using a plurality of exposure control programs, the program must be switched, decreasing the operation speed of the exposure apparatus. Further, transfer of a program to a plurality of apparatuses in advance requires a large capacity memory for storing the program. This requires an increase in resources for managing the semiconductor production exposure control programs and capacity of a storage device such as a disk.
When the exposure apparatus is so constituted as to project a pattern within a fixed region on a reticle, no plurality of exposure control programs is required, but the limitations with respect to the circuit pattern area on the reticle increase. To prevent this, the exposure apparatus is arranged such that a circuit pattern and an alignment mark pattern are prepared on a reticle only as needed so as to project the alignment mark to an arbitrary portion. In this case, the above-mentioned problems arise.